Gate-level Circuit Simulation

Dec 1, 10112
A demo.
  • Advisor: Professor Yibo Lin.
  • Leveraged CUDA for parallel computing to accelerate gate-level circuit simulations significantly.
  • Concentrated on optimizing simulation performance for circuits with low switching activity inputs which is more common in modern VLSI circuit analysis.
Yufan Du
Yufan Du
PhD Student

My research focuses on differentiable optimization, AI4EDA, software and hardware co-design, and compiler design.